mram3  2.0.0.0
mram3.h
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22 
28 #ifndef MRAM3_H
29 #define MRAM3_H
30 
31 #ifdef __cplusplus
32 extern "C"{
33 #endif
34 
39 #ifdef PREINIT_SUPPORTED
40 #include "preinit.h"
41 #endif
42 
43 #ifdef MikroCCoreVersion
44  #if MikroCCoreVersion >= 1
45  #include "delays.h"
46  #endif
47 #endif
48 
49 #include "drv_digital_out.h"
50 #include "drv_digital_in.h"
51 #include "drv_spi_master.h"
52 #include "spi_specifics.h"
53 
74 #define MRAM3_CMD_NOP 0x00
75 #define MRAM3_CMD_WRITE_ENABLE 0x06
76 #define MRAM3_CMD_WRITE_DISABLE 0x04
77 #define MRAM3_CMD_ENABLE_DPI 0x37
78 #define MRAM3_CMD_ENABLE_QPI 0x38
79 #define MRAM3_CMD_ENABLE_SPI 0xFF
80 #define MRAM3_CMD_ENTER_DEEP_POWER_DOWN 0xB9
81 #define MRAM3_CMD_ENTER_HIBERNATE 0xBA
82 #define MRAM3_CMD_SOFT_RESET_ENABLE 0x66
83 #define MRAM3_CMD_SOFT_RESET 0x99
84 #define MRAM3_CMD_EXIT_DEEP_POWER_DOWN 0xAB
85 
90 #define MRAM3_CMD_READ_STATUS 0x05
91 #define MRAM3_CMD_READ_CONFIG_1 0x35
92 #define MRAM3_CMD_READ_CONFIG_2 0x3F
93 #define MRAM3_CMD_READ_CONFIG_3 0x44
94 #define MRAM3_CMD_READ_CONFIG_4 0x45
95 #define MRAM3_CMD_READ_CONFIG_ALL 0x46
96 #define MRAM3_CMD_READ_DEVICE_ID 0x9F
97 #define MRAM3_CMD_READ_UNIQUE_ID 0x4C
98 #define MRAM3_CMD_READ_SERIAL_NUMBER 0xC3
99 #define MRAM3_CMD_READ_AUG_ARRAY_PROTECT 0x14
100 #define MRAM3_CMD_READ_ADDRESS_BASED 0x65
101 
106 #define MRAM3_CMD_WRITE_STATUS 0x01
107 #define MRAM3_CMD_WRITE_CONFIG_ALL 0x87
108 #define MRAM3_CMD_WRITE_SERIAL_NUMBER 0xC2
109 #define MRAM3_CMD_WRITE_AUG_ARRAY_PROTECT 0x1A
110 #define MRAM3_CMD_WRITE_ADDRESS_BASED 0x71
111 
116 #define MRAM3_CMD_READ_MEMORY_SDR 0x03
117 #define MRAM3_CMD_FAST_READ_MEMORY_SDR 0x0B
118 #define MRAM3_CMD_FAST_READ_MEMORY_DDR 0x0D
119 #define MRAM3_CMD_READ_DUAL_OUT_MEMORY_SDR 0x3B
120 #define MRAM3_CMD_READ_QUAD_OUT_MEMORY_SDR 0x6B
121 #define MRAM3_CMD_READ_DUAL_IO_MEMORY_SDR 0xBB
122 #define MRAM3_CMD_READ_DUAL_IO_MEMORY_DDR 0xBD
123 #define MRAM3_CMD_READ_QUAD_IO_MEMORY_SDR 0xEB
124 #define MRAM3_CMD_READ_QUAD_IO_MEMORY_DDR 0xED
125 
130 #define MRAM3_CMD_WRITE_MEMORY_SDR 0x02
131 #define MRAM3_CMD_FAST_WRITE_MEMORY_SDR 0xDA
132 #define MRAM3_CMD_FAST_WRITE_MEMORY_DDR 0xDE
133 #define MRAM3_CMD_WRITE_DUAL_IN_MEMORY_SDR 0xA2
134 #define MRAM3_CMD_WRITE_QUAD_IN_MEMORY_SDR 0x32
135 #define MRAM3_CMD_WRITE_QUAD_IN_MEMORY_DDR 0x31
136 #define MRAM3_CMD_WRITE_DUAL_IO_MEMORY_SDR 0xA1
137 #define MRAM3_CMD_WRITE_QUAD_IO_MEMORY_SDR 0xD2
138 #define MRAM3_CMD_WRITE_QUAD_IO_MEMORY_DDR 0xD1
139 
144 #define MRAM3_CMD_READ_AUG_STORAGE_SDR 0x4B
145 #define MRAM3_CMD_WRITE_AUG_STORAGE_SDR 0x42
146  // mram3_reg
148 
163 #define MRAM3_STATUS_WPEN 0x80
164 #define MRAM3_STATUS_SNPEN 0x40
165 #define MRAM3_STATUS_TBSEL_BOTTOM 0x20
166 #define MRAM3_STATUS_TBSEL_TOP 0x00
167 #define MRAM3_STATUS_BPSEL_NONE 0x00
168 #define MRAM3_STATUS_BPSEL_UPPER_1_64 0x04
169 #define MRAM3_STATUS_BPSEL_UPPER_1_32 0x08
170 #define MRAM3_STATUS_BPSEL_UPPER_1_16 0x0C
171 #define MRAM3_STATUS_BPSEL_UPPER_1_8 0x10
172 #define MRAM3_STATUS_BPSEL_UPPER_QUARTER 0x14
173 #define MRAM3_STATUS_BPSEL_UPPER_HALF 0x18
174 #define MRAM3_STATUS_BPSEL_ALL 0x1C
175 #define MRAM3_STATUS_WREN 0x02
176 
181 #define MRAM3_CONFIG1_MAPLK_LOCK 0x04
182 #define MRAM3_CONFIG1_MAPLK_UNLOCK 0x00
183 #define MRAM3_CONFIG1_ASPLK_LOCK 0x01
184 #define MRAM3_CONFIG1_ASPLK_UNLOCK 0x00
185 #define MRAM3_CONFIG2_QUAD_SPI 0x40
186 #define MRAM3_CONFIG2_DUAL_SPI 0x10
187 #define MRAM3_CONFIG2_MLATS_0_CYCLES 0x00
188 #define MRAM3_CONFIG2_MLATS_1_CYCLE 0x01
189 #define MRAM3_CONFIG2_MLATS_2_CYCLES 0x02
190 #define MRAM3_CONFIG2_MLATS_3_CYCLES 0x03
191 #define MRAM3_CONFIG2_MLATS_4_CYCLES 0x04
192 #define MRAM3_CONFIG2_MLATS_5_CYCLES 0x05
193 #define MRAM3_CONFIG2_MLATS_6_CYCLES 0x06
194 #define MRAM3_CONFIG2_MLATS_7_CYCLES 0x07
195 #define MRAM3_CONFIG2_MLATS_8_CYCLES 0x08
196 #define MRAM3_CONFIG2_MLATS_9_CYCLES 0x09
197 #define MRAM3_CONFIG2_MLATS_10_CYCLES 0x0A
198 #define MRAM3_CONFIG2_MLATS_11_CYCLES 0x0B
199 #define MRAM3_CONFIG2_MLATS_12_CYCLES 0x0C
200 #define MRAM3_CONFIG2_MLATS_13_CYCLES 0x0D
201 #define MRAM3_CONFIG2_MLATS_14_CYCLES 0x0E
202 #define MRAM3_CONFIG2_MLATS_15_CYCLES 0x0F
203 #define MRAM3_CONFIG3_ODSEL_35OHM 0x00
204 #define MRAM3_CONFIG3_ODSEL_75OHM 0x20
205 #define MRAM3_CONFIG3_ODSEL_60OHM 0x40
206 #define MRAM3_CONFIG3_ODSEL_45OHM 0x60
207 #define MRAM3_CONFIG3_ODSEL_40OHM 0xA0
208 #define MRAM3_CONFIG3_ODSEL_20OHM 0xC0
209 #define MRAM3_CONFIG3_ODSEL_15OHM 0xE0
210 #define MRAM3_CONFIG3_WRAPS_ENABLE 0x10
211 #define MRAM3_CONFIG3_WRPLS_16BYTE 0x00
212 #define MRAM3_CONFIG3_WRPLS_32BYTE 0x01
213 #define MRAM3_CONFIG3_WRPLS_64BYTE 0x02
214 #define MRAM3_CONFIG3_WRPLS_128BYTE 0x03
215 #define MRAM3_CONFIG3_WRPLS_256BYTE 0x04
216 #define MRAM3_CONFIG4_WRENS_NORMAL 0x04
217 #define MRAM3_CONFIG4_WRENS_SRAM 0x05
218 #define MRAM3_CONFIG4_WRENS_BACK_TO_BACK 0x06
219 
224 #define MRAM3_MIN_ADDRESS 0x000000
225 #define MRAM3_MAX_ADDRESS 0x01FFFFul
226 
231 #define MRAM3_DEVICE_ID 0xE6010102ul
232 
241 #define MRAM3_SET_DATA_SAMPLE_EDGE SET_SPI_DATA_SAMPLE_EDGE
242 #define MRAM3_SET_DATA_SAMPLE_MIDDLE SET_SPI_DATA_SAMPLE_MIDDLE
243  // mram3_set
245 
260 #define MRAM3_MAP_MIKROBUS( cfg, mikrobus ) \
261  cfg.miso = MIKROBUS( mikrobus, MIKROBUS_MISO ); \
262  cfg.mosi = MIKROBUS( mikrobus, MIKROBUS_MOSI ); \
263  cfg.sck = MIKROBUS( mikrobus, MIKROBUS_SCK ); \
264  cfg.cs = MIKROBUS( mikrobus, MIKROBUS_CS ); \
265  cfg.io3 = MIKROBUS( mikrobus, MIKROBUS_RST ); \
266  cfg.wp = MIKROBUS( mikrobus, MIKROBUS_PWM );
267  // mram3_map // mram3
270 
275 typedef struct
276 {
277  // Output pins
278  digital_out_t io3;
279  digital_out_t wp;
281  // Modules
282  spi_master_t spi;
284  pin_name_t chip_select;
286 } mram3_t;
287 
292 typedef struct
293 {
294  // Communication gpio pins
295  pin_name_t miso;
296  pin_name_t mosi;
297  pin_name_t sck;
298  pin_name_t cs;
300  // Additional gpio pins
301  pin_name_t io3;
302  pin_name_t wp;
304  // static variable
305  uint32_t spi_speed;
306  spi_master_mode_t spi_mode;
307  spi_master_chip_select_polarity_t cs_polarity;
309 } mram3_cfg_t;
310 
315 typedef enum
316 {
317  MRAM3_OK = 0,
318  MRAM3_ERROR = -1
319 
321 
338 
352 err_t mram3_init ( mram3_t *ctx, mram3_cfg_t *cfg );
353 
366 err_t mram3_default_cfg ( mram3_t *ctx );
367 
379 err_t mram3_write_cmd ( mram3_t *ctx, uint8_t cmd );
380 
395 err_t mram3_write_cmd_data ( mram3_t *ctx, uint8_t cmd, uint8_t *data_in, uint8_t len );
396 
411 err_t mram3_read_cmd_data ( mram3_t *ctx, uint8_t cmd, uint8_t *data_out, uint8_t len );
412 
428 err_t mram3_write_cmd_address_data ( mram3_t *ctx, uint8_t cmd, uint32_t address, uint8_t *data_in, uint32_t len );
429 
445 err_t mram3_read_cmd_address_data ( mram3_t *ctx, uint8_t cmd, uint32_t address, uint8_t *data_out, uint32_t len );
446 
461 err_t mram3_memory_write ( mram3_t *ctx, uint32_t address, uint8_t *data_in, uint32_t len );
462 
477 err_t mram3_memory_read ( mram3_t *ctx, uint32_t address, uint8_t *data_out, uint32_t len );
478 
493 err_t mram3_aug_memory_write ( mram3_t *ctx, uint8_t address, uint8_t *data_in, uint8_t len );
494 
509 err_t mram3_aug_memory_read ( mram3_t *ctx, uint8_t address, uint8_t *data_out, uint8_t len );
510 
522 
532 
542 
551 err_t mram3_soft_reset ( mram3_t *ctx );
552 
564 err_t mram3_write_status ( mram3_t *ctx, uint8_t status );
565 
577 err_t mram3_read_status ( mram3_t *ctx, uint8_t *status );
578 
579 #ifdef __cplusplus
580 }
581 #endif
582 #endif // MRAM3_H
583  // mram3
585 
586 // ------------------------------------------------------------------------ END
mram3_init
err_t mram3_init(mram3_t *ctx, mram3_cfg_t *cfg)
MRAM 3 initialization function.
MRAM3_OK
@ MRAM3_OK
Definition: mram3.h:317
mram3_cfg_t::sck
pin_name_t sck
Definition: mram3.h:297
mram3_write_cmd
err_t mram3_write_cmd(mram3_t *ctx, uint8_t cmd)
MRAM 3 write cmd function.
mram3_cfg_t::mosi
pin_name_t mosi
Definition: mram3.h:296
mram3_cfg_t::miso
pin_name_t miso
Definition: mram3.h:295
mram3_memory_write
err_t mram3_memory_write(mram3_t *ctx, uint32_t address, uint8_t *data_in, uint32_t len)
MRAM 3 memory write function.
mram3_t::wp
digital_out_t wp
Definition: mram3.h:279
mram3_write_status
err_t mram3_write_status(mram3_t *ctx, uint8_t status)
MRAM 3 write status function.
mram3_cfg_t::spi_mode
spi_master_mode_t spi_mode
Definition: mram3.h:306
spi_specifics.h
This file contains SPI specific macros, functions, etc.
mram3_write_enable
err_t mram3_write_enable(mram3_t *ctx)
MRAM 3 write enable function.
mram3_t::spi
spi_master_t spi
Definition: mram3.h:282
mram3_check_communication
err_t mram3_check_communication(mram3_t *ctx)
MRAM 3 check communication function.
mram3_cfg_t
MRAM 3 Click configuration object.
Definition: mram3.h:293
mram3_cfg_t::io3
pin_name_t io3
Definition: mram3.h:301
mram3_cfg_t::cs
pin_name_t cs
Definition: mram3.h:298
mram3_aug_memory_write
err_t mram3_aug_memory_write(mram3_t *ctx, uint8_t address, uint8_t *data_in, uint8_t len)
MRAM 3 aug memory write function.
mram3_memory_read
err_t mram3_memory_read(mram3_t *ctx, uint32_t address, uint8_t *data_out, uint32_t len)
MRAM 3 memory read function.
mram3_default_cfg
err_t mram3_default_cfg(mram3_t *ctx)
MRAM 3 default configuration function.
mram3_read_status
err_t mram3_read_status(mram3_t *ctx, uint8_t *status)
MRAM 3 read status function.
mram3_read_cmd_address_data
err_t mram3_read_cmd_address_data(mram3_t *ctx, uint8_t cmd, uint32_t address, uint8_t *data_out, uint32_t len)
MRAM 3 read cmd address data function.
mram3_read_cmd_data
err_t mram3_read_cmd_data(mram3_t *ctx, uint8_t cmd, uint8_t *data_out, uint8_t len)
MRAM 3 read cmd data function.
mram3_cfg_setup
void mram3_cfg_setup(mram3_cfg_t *cfg)
MRAM 3 configuration object setup function.
mram3_return_value_t
mram3_return_value_t
MRAM 3 Click return value data.
Definition: mram3.h:316
mram3_t
MRAM 3 Click context object.
Definition: mram3.h:276
mram3_write_cmd_data
err_t mram3_write_cmd_data(mram3_t *ctx, uint8_t cmd, uint8_t *data_in, uint8_t len)
MRAM 3 write cmd data function.
mram3_cfg_t::cs_polarity
spi_master_chip_select_polarity_t cs_polarity
Definition: mram3.h:307
mram3_cfg_t::spi_speed
uint32_t spi_speed
Definition: mram3.h:305
mram3_t::chip_select
pin_name_t chip_select
Definition: mram3.h:284
mram3_aug_memory_read
err_t mram3_aug_memory_read(mram3_t *ctx, uint8_t address, uint8_t *data_out, uint8_t len)
MRAM 3 aug memory read function.
mram3_cfg_t::wp
pin_name_t wp
Definition: mram3.h:302
mram3_soft_reset
err_t mram3_soft_reset(mram3_t *ctx)
MRAM 3 soft reset function.
mram3_write_protect
err_t mram3_write_protect(mram3_t *ctx)
MRAM 3 write protect function.
mram3_write_cmd_address_data
err_t mram3_write_cmd_address_data(mram3_t *ctx, uint8_t cmd, uint32_t address, uint8_t *data_in, uint32_t len)
MRAM 3 write cmd address data function.
mram3_t::io3
digital_out_t io3
Definition: mram3.h:278
MRAM3_ERROR
@ MRAM3_ERROR
Definition: mram3.h:318