enocean  2.0.0.0
enocean.h
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1 /*
2  * MikroSDK - MikroE Software Development Kit
3  * Copyright© 2020 MikroElektronika d.o.o.
4  *
5  * Permission is hereby granted, free of charge, to any person
6  * obtaining a copy of this software and associated documentation
7  * files (the "Software"), to deal in the Software without restriction,
8  * including without limitation the rights to use, copy, modify, merge,
9  * publish, distribute, sublicense, and/or sell copies of the Software,
10  * and to permit persons to whom the Software is furnished to do so,
11  * subject to the following conditions:
12  *
13  * The above copyright notice and this permission notice shall be
14  * included in all copies or substantial portions of the Software.
15  *
16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
17  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
19  * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM,
20  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE
22  * OR OTHER DEALINGS IN THE SOFTWARE.
23  */
24 
33 // ----------------------------------------------------------------------------
34 
35 #ifndef ENOCEAN_H
36 #define ENOCEAN_H
37 
42 #ifdef PREINIT_SUPPORTED
43 #include "preinit.h"
44 #endif
45 
46 #ifdef MikroCCoreVersion
47  #if MikroCCoreVersion >= 1
48  #include "delays.h"
49  #endif
50 #endif
51 
52 #include "drv_digital_out.h"
53 #include "drv_digital_in.h"
54 #include "drv_uart.h"
55 
56 
57 // -------------------------------------------------------------- PUBLIC MACROS
67 #define ENOCEAN_MAP_MIKROBUS( cfg, mikrobus ) \
68  cfg.tx_pin = MIKROBUS( mikrobus, MIKROBUS_TX ); \
69  cfg.rx_pin = MIKROBUS( mikrobus, MIKROBUS_RX ); \
70  cfg.en = MIKROBUS( mikrobus, MIKROBUS_PWM ); \
71  cfg.rst = MIKROBUS( mikrobus, MIKROBUS_RST )
72 
79 #define ENOCEAN_RETVAL uint8_t
80 
81 #define ENOCEAN_OK 0x00
82 #define ENOCEAN_INIT_ERROR 0xFF
83 
89 #define DRV_RX_BUFFER_SIZE 500
90 #define DRV_TX_BUFFER_SIZE 100
91 
94 #define ENOCEAN_SYNC_BYTE 0x55
95 #define ENOCEAN_MAX_BUFF_SIZE 256
96 #define ENOCEAN_HEADER_SIZE 0x04
97 #define ENOCEAN_BUFF_EMPTY 0x00
98 
99 
100 #define ENOCEAN_RESPONSE_READY 0x01
101 #define ENOCEAN_RESPONSE_NOT_READY 0x00
102 #define ENOCEAN_UART_RX_READY 0x01
103 #define ENOCEAN_UART_RX_NOT_READY 0x00
104 #define ENOCEAN_OK 0x00
105 #define ENOCEAN_INVALID_PACKET_SIZE 0x01
106 
107 #define ENOCEAN_PACK_TYPE_EVENT 0x04
108 #define ENOCEAN_PACK_TYPE_COMMON_COMMAND 0x05
109 #define ENOCEAN_CO_EVENT_SECUREDEVICES 0x05
110 #define ENOCEAN_CO_WR_FILTER_ADD 0x0B
111 #define ENOCEAN_CO_WR_FILTER_ENABLE 0x0E
112 #define ENOCEAN_CO_WR_REPEATER 0x09
113 #define ENOCEAN_CO_SET_NOISETHRESHOLD 0x32
114 
115 #define ENOCEAN_FILT_TYPE_SOURCE_ID 0x00
116 #define ENOCEAN_FILT_TYPE_R_ORG 0x01
117 #define ENOCEAN_FILT_TYPE_RSSI 0x02
118 #define ENOCEAN_FILT_TYPE_DEST_ID 0x03
119 #define ENOCEAN_FILT_KIND_NEG_TEL_FWRD 0x00
120 #define ENOCEAN_FILT_KIND_POS_TEL_FWRD 0x80
121 #define ENOCEAN_FILT_KIND_NEG_TEL_RPT 0x40
122 #define ENOCEAN_FILT_KIND_POS_TEL_RPT 0xC0
123 #define ENOCEAN_FILT_FWRD_OFF 0x00
124 #define ENOCEAN_FILT_FWRD_ON 0x01
125 #define ENOCEAN_FILT_OP_OR_ALL_FILT 0x00
126 #define ENOCEAN_FILT_OP_AND_ALL_FILT 0x01
127 #define ENOCEAN_FILT_OP_OR_RADIO_INTER_AND_FILT_RPT 0x08
128 #define ENOCEAN_FILT_OP_AND_RADIO_INTER_OR_FILT_RPT 0x09
129 #define ENOCEAN_RPT_OFF 0x00
130 #define ENOCEAN_RPT_ALL_TELEG 0x01
131 #define ENOCEAN_RPT_SELECTIVE 0x02
132 #define ENOCEAN_RPT_LEVEL_OFF 0x00
133 #define ENOCEAN_RPT_LEVEL_ONE 0x01
134 #define ENOCEAN_RPT_LEVEL_TWO 0x02
135 #define ENOCEAN_RSSI_LEVEL_100_DBM_NEG 0x2E
136 #define ENOCEAN_RSSI_LEVEL_99_DBM_NEG 0x2F
137 #define ENOCEAN_RSSI_LEVEL_98_DBM_NEG 0x30
138 #define ENOCEAN_RSSI_LEVEL_97_DBM_NEG 0x31
139 #define ENOCEAN_RSSI_LEVEL_96_DBM_NEG 0x32
140 #define ENOCEAN_RSSI_LEVEL_95_DBM_NEG 0x33
141 #define ENOCEAN_RSSI_LEVEL_94_DBM_NEG 0x34
142 #define ENOCEAN_RSSI_LEVEL_93_DBM_NEG 0x35
143 #define ENOCEAN_RSSI_LEVEL_92_DBM_NEG 0x36
144 #define ENOCEAN_RSSI_LEVEL_91_DBM_NEG 0x37
145 #define ENOCEAN_RSSI_LEVEL_90_DBM_NEG 0x38
146  // End group macro
148 // --------------------------------------------------------------- PUBLIC TYPES /** @{ */
154 
155 typedef struct {
156 
157  uint16_t data_length;
158  uint8_t opt_length;
159  uint8_t packet_type;
160  uint8_t data_buff[ 256 ];
161 
163 
164 typedef void ( *enocean_hdl_t )( enocean_packet_t*, uint16_t* );
165 
169 typedef struct
170 {
171  // Output pins
172 
173  digital_out_t rst;
174  digital_out_t en;
175 
176  // Modules
177 
178  uart_t uart;
179 
180  char uart_rx_buffer[ DRV_RX_BUFFER_SIZE ];
181  char uart_tx_buffer[ DRV_TX_BUFFER_SIZE ];
182 
184  uint8_t response_ready;
185 
186 } enocean_t;
187 
191 typedef struct
192 {
193  // Communication gpio pins
194 
195  pin_name_t rx_pin;
196  pin_name_t tx_pin;
197 
198  // Additional gpio pins
199 
200  pin_name_t rst;
201  pin_name_t en;
202 
203  // static variable
204 
205  uint32_t baud_rate; // Clock speed.
207  uart_data_bits_t data_bit; // Data bits.
208  uart_parity_t parity_bit; // Parity bit.
209  uart_stop_bits_t stop_bit; // Stop bits.
210 
211 } enocean_cfg_t;
212 
216 typedef uint8_t enocean_error_t;
217  // End types group
219 
220 // ----------------------------------------------- PUBLIC FUNCTION DECLARATIONS
221 
227 #ifdef __cplusplus
228 extern "C"{
229 #endif
230 
240 
249 
255 void enocean_set_rst_pin ( enocean_t *ctx, uint8_t state );
256 
263 void enocean_generic_write ( enocean_t *ctx, char *data_buf, uint16_t len );
264 
272 int32_t enocean_generic_read ( enocean_t *ctx, char *data_buf, uint16_t max_len );
273 
283 
295 
306 
316 
317 
318 #ifdef __cplusplus
319 }
320 #endif
321 #endif // _ENOCEAN_H_
322  // End public_function group
325 
326 // ------------------------------------------------------------------------- END
DRV_RX_BUFFER_SIZE
#define DRV_RX_BUFFER_SIZE
Definition: enocean.h:89
enocean_response_ready
uint8_t enocean_response_ready(enocean_t *ctx)
Response Ready function.
enocean_cfg_t::stop_bit
uart_stop_bits_t stop_bit
Definition: enocean.h:209
enocean_t::rst
digital_out_t rst
Definition: enocean.h:173
enocean_response_handler_set
void enocean_response_handler_set(enocean_t *ctx, enocean_hdl_t handler)
Handler Set function.
enocean_packet_t
Definition: enocean.h:155
enocean_packet_t::packet_type
uint8_t packet_type
Definition: enocean.h:159
enocean_cfg_t::en
pin_name_t en
Definition: enocean.h:201
enocean_cfg_t::baud_rate
uint32_t baud_rate
Definition: enocean.h:205
enocean_init
ENOCEAN_RETVAL enocean_init(enocean_t *ctx, enocean_cfg_t *cfg)
Initialization function.
enocean_send_packet
uint8_t enocean_send_packet(enocean_t *ctx, enocean_packet_t *packet)
Packet Send function.
enocean_hdl_t
void(* enocean_hdl_t)(enocean_packet_t *, uint16_t *)
Definition: enocean.h:164
ENOCEAN_RETVAL
#define ENOCEAN_RETVAL
Definition: enocean.h:79
enocean_t::uart
uart_t uart
Definition: enocean.h:178
enocean_cfg_setup
void enocean_cfg_setup(enocean_cfg_t *cfg)
Config Object Initialization function.
enocean_cfg_t::tx_pin
pin_name_t tx_pin
Definition: enocean.h:196
enocean_cfg_t::uart_blocking
bool uart_blocking
Definition: enocean.h:206
enocean_error_t
uint8_t enocean_error_t
Error type.
Definition: enocean.h:216
enocean_generic_read
int32_t enocean_generic_read(enocean_t *ctx, char *data_buf, uint16_t max_len)
Generic read function.
enocean_set_rst_pin
void enocean_set_rst_pin(enocean_t *ctx, uint8_t state)
Set RST ( reset ) pin state.
enocean_t::response_ready
uint8_t response_ready
Definition: enocean.h:184
enocean_cfg_t::rx_pin
pin_name_t rx_pin
Definition: enocean.h:195
enocean_cfg_t::data_bit
uart_data_bits_t data_bit
Definition: enocean.h:207
enocean_packet_t::opt_length
uint8_t opt_length
Definition: enocean.h:158
DRV_TX_BUFFER_SIZE
#define DRV_TX_BUFFER_SIZE
Definition: enocean.h:90
enocean_t::en
digital_out_t en
Definition: enocean.h:174
enocean_cfg_t
Click configuration structure definition.
Definition: enocean.h:192
enocean_cfg_t::parity_bit
uart_parity_t parity_bit
Definition: enocean.h:208
enocean_cfg_t::rst
pin_name_t rst
Definition: enocean.h:200
enocean_packet_t::data_length
uint16_t data_length
Definition: enocean.h:157
enocean_uart_isr
void enocean_uart_isr(enocean_t *ctx)
UART Interrupt Routine function.
enocean_t::driver_hdl
enocean_hdl_t driver_hdl
Definition: enocean.h:183
enocean_t
Click ctx object definition.
Definition: enocean.h:170
enocean_generic_write
void enocean_generic_write(enocean_t *ctx, char *data_buf, uint16_t len)
Generic write function.